Indian Institute of Information Technology

Dr. R. Shathanaa

Assistant Professor

Office Address:

2nd Floor, Academic Building
Department of Computer Science and Engineering
Indian Institute of Information Technology, Sri City, Chittoor
Andhra Pradesh - 517 646, India

Academic Qualifications

Education:

PhD (NIT, Tiruchirapalli)
Thesis Title: Improving the Performance of Design Space Exploration for Architectural Synthesis

Research Areas of Interest

Computer Architecture, Applied Soft Computing, Architectural Synthesis

Awards / Honours

  • Visvesvaraya fellowship from MeitY, India for research
  • Gold Medal from College of Engineering Guindy, Anna University for University rank.
  • Best Outgoing Top Ranking student award from College of Engineering Guindy, Anna University for University rank.

Projects

Publications

Journal Publications

  • Rajmohan, Shathanaa, N. Ramasubramanian, and Nagi Naganathan. "Hybrid Evolutionary Design Space Exploration Algorithm with Defence against Third Party IP Vulnerabilities." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 39 (10) pp. 2602-2614, (2019).
  • Rajmohan, Shathanaa, and N. Ramasubramanian. "Group influence based improved firefly algorithm for Design Space Exploration of Datapath resource allocation." Applied Intelligence 49.6 (2019): 2084-2100.
  • Rajmohan, Shathanaa, N. Ramasubramanian, "A Memetic Algorithm-Based Design Space Exploration for Datapath Resource Allocation During High-Level Synthesis." Journal of Circuits, Systems and Computers 29, (2019).
  • Rajmohan, Shathanaa, N. Ramasubramanian, and Nagi Naganathan, "Design Space Exploration for Reducing Cost of Hardware Trojan Detection and Isolation during Architectural Synthesis." Journal of Circuits, Systems and Computers Vol 30 (9), Jul 2021 (Accepted)

Conference Publications

  • Shathanaa, Rajmohan, and N. Ramasubramanian. "Design Space Exploration for Architectural Synthesis—A Survey." Recent Findings in Intelligent Computing Techniques. Springer, Singapore, 2018. 519-527.
  • Shathanaa, Rajmohan, and N. Ramasubramanian. "Improving Power & Latency Metrics for Hardware Trojan Detection During High Level Synthesis." 2018 9th International Conference on Computing, Communication and Networking Technologies (ICCCNT), Bangalore, 2018, pp. 1-7, doi: 10.1109/ICCCNT.2018.8494102

Students

Teaching

Contact Information

Address for Communication:

2nd Floor, Academic Building
Indian Institute of Information Technology, Sri City, Chittoor
630, Gnan Marg, Sri City, Satyavedu Mandal
Chittoor District - 517 646, Andhra Pradesh, India